/* Initialize all configured peripherals */
  MX_GPIO_Init();
  MX_ADC1_Init();
  /* USER CODE BEGIN 2 */

    my_cpp_main();

  /* USER CODE END 2 */

  /* Infinite loop */
  /* USER CODE BEGIN WHILE */
  while (1)
  {
    /* USER CODE END WHILE */

    /* USER CODE BEGIN 3 */
  }
  /* USER CODE END 3 */

    GPIOB->ODR = 0;
    GPIOB->AFR[0] = AFRf(2, 0) | AFRf(7, 3) | AFRf(10, 5);
    GPIOB->AFR[1] = AFRf(1, 8) | AFRf(7, 10) | AFRf(5, 13) | AFRf(5, 14) | AFRf(5, 15);
    GPIOB->MODER = MODER_AF(0) | MODER_O(1) | MODER_O(2) | MODER_AF(3) | MODER_O(4) | MODER_AF(5) | MODER_O(6)
                 | MODER_I(7) | MODER_AF(8) | MODER_I(9) | MODER_AF(10) | MODER_I(11) | MODER_O(12) | MODER_AF(13)
                 | MODER_AF(14) | MODER_AF(15);
    GPIOB->OSPEEDR = OSPEED_HI(0) | OSPEED_HI(5) | OSPEED_HI(8) | OSPEED_MED(13) | OSPEED_MED(14) | OSPEED_MED(15);

class HW_Cnt32 : public HW_Timer_base, protected IRQ
{
       ....
    protected:

        virtual void IRQ_Handler( void );

        ......
};

#ifndef BOARD_..._H
#define BOARD_..._H

#define CLKIN_XTAL    24000000   //[Hz] frequency of external main crystal or oscillator
#define CLKIN_OSCHP   1          //==1 - generator on XTAL1 (Direct Input Mode); ==0 - quartz on XTAL1/2 (Crystal Mode)
#define CLKIN_RTCX    32768      //[Hz] external frequency for RTC

//Allocation USIC-s
#define nUSIC_df          2,  1  //USIC/channel's number for SPI-FLASH
#define nUSIC_rf          0,  1  //USIC/channel's number for RF-unit
#define nUSIC_service     0,  0  //USIC/channel's number for log-UART
#define nUSIC_term        2,  0  //USIC/channel's number for UART of terminal
//Allocation CCU-timers/slices
#define nCCU_intmon       40, 0  //timer/slice numbers for monitoring of duration of interrupts bans (for debug)
#define nCCU_dac_trig     40, 1  //timer/slice numbers for trigger-signals for DAC
#define nCCU_dac_exe      40, 2  //timer/slice numbers for interrupt generation in middle/end of DMA-block of DAC
#define nCCU_adc_trig     41, 0  //timer/slice numbers for trigger-signals for ADC
#define nCCU_adc_res      41, 1  //timer/slice numbers
#define nCCU_buzzer       40, 3  //timer/slice numbers for buzzer

#define PIN_SERV_RX       1,  4  //RX nUSIC_service
#define PIN_SERV_TX       1,  5  //TX nUSIC_service
#define PIN_TERM_RX       5,  1  //RX nUSIC_term
#define PIN_TERM_TX       5,  0  //TX nUSIC_term
#define PIN_LED1          5,  9  //LED1; bool."1" - is lighting
#define PIN_LED2          3,  14 //LED2; bool."1" - is lighting
#define PIN_LED3          6,  0  //LED3; bool."1" - is lighting
#define PIN_BUZZER        0,  12 //==1 - buzzer enable
#define PIN_DAC_GEN       14, 8  //generator's output
#define PIN_DF_SCLK       4,  2  //SCLK for nUSIC_df
#define PIN_DF_MOSI       4,  7  //MOSI for nUSIC_df
#define PIN_DF_MISO       4,  6  //MISO for nUSIC_df
#define PIN_DF_CS         4,  3  //CS for N25Q032A on nUSIC_df
#define PIN_DF_WP         4,  5  //WP for N25Q032A
#define PIN_DF_HOLD       4,  4  //HOLD for N25Q032A
#define PIN_A_IN1         14, 0  //analog input 1
#define PIN_A_IN2         14, 1  //analog input 2
#define PIN_RF_SCLK       3,  0  //SCLK for nUSIC_rf
#define PIN_RF_MOSI       3,  13 //MOSI for nUSIC_rf
#define PIN_RF_MISO       4,  0  //MISO for nUSIC_rf
#define PIN_RF_CS         3,  1  //CS for RF-unit
#define PIN_RF_RST        3,  12 //NRESET for RF-unit; active - bool.0, >=100mcs, >=5ms - startup time
#define PIN_RF_BOOST      0,  13 //BOOST switch control
#define PIN_RF_LF         0,  14 //antenna switch control LF
#define PIN_RF_HF         0,  15 //antenna switch control HF
#define PIN_DIAG          2,  2  //thermal protection input from generator

//Allocation ADC-inputs (group, channel)
#define nADC_in1          0,  0  //analog input 1
#define nADC_in2          0,  1  //analog input 2

//Allocation GPDMA lines (DMALINEx_...) for DLR. Channels are allocated similarly.
#define nDMALINE_dac      1
#define nDMALINE_df_RX    8
#define nDMALINE_df_TX    9
//Allocation of Service Requests for all CCUs. Each element also needs to be added to the list CHK_SRCCU!
#define nCCU_SR_intmon    0, nCCU_intmon    //SR for nCCU_intmon
#define nCCU_SR_dac_trig  1, nCCU_dac_trig  //SR for DAC-triggering
#define nCCU_SR_dac_exe   2, nCCU_dac_exe   //SR generating an interrupt in middle/end of a block of samples transmitted to the DAC
#define nCCU_SR_adc_trig  2, nCCU_adc_trig  //SR for ADC-triggering
#define nCCU_SR_adc_res   1, nCCU_adc_res   //SR reading result from ADC
#define nCCU_SR_buzzer    3, nCCU_buzzer    //SR interrupt for buzzer control
//Allocation of Service Requests for all USICs. Each element also needs to be added to the list CHK_SRUSIC!
#define nUSIC_SR_serv_RX  3, nUSIC_service
#define nUSIC_SR_serv_TX  4, nUSIC_service
#define nUSIC_SR_serv_ERR 5, nUSIC_service
#define nUSIC_SR_term_RX  3, nUSIC_term
#define nUSIC_SR_term_TX  4, nUSIC_term
#define nUSIC_SR_term_ERR 5, nUSIC_term
#define nUSIC_SR_df_RX    0, nUSIC_df
#define nUSIC_SR_df_TX    1, nUSIC_df
#define nUSIC_SR_df_ERR   2, nUSIC_df
#define nUSIC_SR_rf_RX    0, nUSIC_rf
#define nUSIC_SR_rf_ERR   1, nUSIC_rf

#endif