#include "stm32f1xx.h"

volatile uint32_t msTicks;                                 // counts 1ms timeTicks
/*----------
 * SysTick_Handler:
 *----------*/
void SysTick_Handler(void)
{
    msTicks++;
}

/*----------
 * Delay: delays a number of Systicks
 *----------*/
void Delay (uint32_t dlyTicks)
{
    uint32_t curTicks;

    curTicks = msTicks;
    while ((msTicks - curTicks) < dlyTicks)
    {
        __NOP();
    }
}

int main(void)
{
    RCC->APB2ENR |= RCC_APB2ENR_IOPAEN;
    GPIOA->CRL |=  (GPIO_CRL_MODE0_1 |
                    GPIO_CRL_MODE1_1 |
                    GPIO_CRL_MODE2_1 |
                    GPIO_CRL_MODE3_1 |
                    GPIO_CRL_MODE4_1 |
                    GPIO_CRL_MODE5_1 |
                    GPIO_CRL_MODE6_1 |
                    GPIO_CRL_MODE7_1 );
    GPIOA->CRH |=  (GPIO_CRH_MODE8_1 |
                    GPIO_CRH_MODE9_1 );
   
   SysTick_Config(8000000UL / 1000);                  // SysTick 1 msec interrupts

    while (1)
    {
        GPIOA->ODR ^=(uint16_t)(1<<0);
        Delay(500);
    }

}

#include "stm32f103x6.h"
#include "hd44780_driver.h"

volatile uint32_t msTicks;                                 // counts 1ms timeTicks
extern void Delay (uint32_t dlyTicks);
/*----------
 * SysTick_Handler:
 *----------*/
void SysTick_Handler(void)
{
    msTicks++;
}

/*----------
 * Delay: delays a number of Systicks
 *----------*/
void Delay (uint32_t dlyTicks)
{
    uint32_t curTicks;

    curTicks = msTicks;
    while ((msTicks - curTicks) < dlyTicks)
    {
        __NOP();
    }
}

void InitTimers()
{
    TIM3->ARR = 1000; //1000
    TIM3->PSC = 8000; //8000000/8000 = 1000
    TIM3->CR2 |= TIM_CR2_MMS_0; //Enable - the Counter enable signal, CNT_EN, is used as trigger output (TRGO). It is
//useful to start several timers at the same time or to control a window in which a slave timer is
//enabled. The Counter Enable signal is generated by a logic OR between CEN control bit
//and the trigger input when configured in gated mode.
//When the Counter Enable signal is controlled by the trigger input, there is a delay on TRGO,
//except if the master/slave mode is selected (see the MSM bit description in TIMx_SMCR register).

   //    TIM3->DIER |= TIM_DIER_UIE; // Update interrupt enabled
    TIM3->CR1 |= TIM_CR1_CEN | TIM_CR1_DIR | TIM_CR1_OPM; //Counter used as downcounter
//Counter stops counting at the next update event (clearing the bit CEN)   
//Counter enabled
}

int main(void)
{
    RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_TIM1EN;
    RCC->APB1ENR |= RCC_APB1ENR_TIM2EN | RCC_APB1ENR_TIM3EN;
   GPIOA->CRL |=  (GPIO_CRL_MODE0_1 |
                    GPIO_CRL_MODE1_1 |
                    GPIO_CRL_MODE2_1 |
                    GPIO_CRL_MODE3_1 |
                    GPIO_CRL_MODE4_1 |
                    GPIO_CRL_MODE5_1 |
                    GPIO_CRL_MODE6_1 |
                    GPIO_CRL_MODE7_1 );
    GPIOA->CRH |=  (GPIO_CRH_MODE8_1 |
                    GPIO_CRH_MODE9_1 );

    SysTick_Config(8000000UL / 1000);                  // SysTick 1 msec interrupts
   
    LCD(COM, 0x30);
    Delay(4);
    LCD(COM, 0x30);
    Delay(2);
    LCD(COM, 0x30);
    Delay(2);
    LCD(COM, 0x3C);
    Delay(2);
    LCD(COM, 0x0C);
    Delay(2);
    LCD(COM, 0x01);
    Delay(2);
    LCD(COM, 0x80);
    Delay(2);
    LCD_STRING("Hello");
    LCD(COM, 0xC0);
    LCD_STRING("Radiokot");
   
   InitTimers();

    while (1)
    {
        GPIOA->ODR ^=(uint16_t)(1<<0);
      TIM3->CR1 |= TIM_CR1_CEN;
      while ( (TIM3->CR1 & TIM_CR1_CEN) == TIM_CR1_CEN);
    }
}