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Код: Выделить всё

#include <stm32h7xx.h>
#include "config.h"

extern void *_estack;

extern "C" void Reset_Handler();
extern "C" void Default_Handler();
int main();

using FP = void(*)();

#ifdef sram_layout
FP isrVectors[166] __attribute__((section(".isr_vector_ram"), used))
{
	(FP)&_estack,
	&Reset_Handler
};
#else
FP isrVectors[166] __attribute__((section(".isr_vector_ram"), used));

FP fvectors[] __attribute__((section(".isr_vector"), used)) =
{
	(FP)&_estack,
	&Reset_Handler,
};
#endif

void setVectorTable(IRQn_Type irqn, FP fp)
{
	isrVectors[int(irqn) + 16] = FP(fp);
	__DSB();
	__ISB();
}

extern uint8_t _data_load, _data, _data_size;
extern uint8_t _bss, _bss_size;
extern uint8_t _itcm_load, _itcm, _itcm_size;
extern uint8_t _itcm_bss, _itcm_bss_size;
extern uint8_t _dtcm_load, _dtcm, _dtcm_size;
extern uint8_t _dtcm_bss, _dtcm_bss_size;
extern uint8_t _sram123_load, _sram123, _sram123_size;
extern uint8_t _sram123_bss, _sram123_bss_size;
extern uint8_t _sram4_load, _sram4, _sram4_size;
extern uint8_t _sram4_bss, _sram4_bss_size;

void SystemInit()
{
	SCB->CPACR = SCB->CPACR | (3 << 10 * 2) | (3 << 11 * 2);  // set CP10 and CP11 Full Access
	
	RCC->CR = RCC->CR | RCC_CR_HSION;
    RCC->CFGR = 0;
 	RCC->CR = RCC->CR & ~(RCC_CR_HSEON | RCC_CR_CSSHSEON | RCC_CR_CSION | RCC_CR_HSI48ON | RCC_CR_CSIKERON | RCC_CR_PLL1ON | RCC_CR_PLL2ON | RCC_CR_PLL3ON);

    RCC->D1CFGR = 0;
    RCC->D2CFGR = 0;
    RCC->D3CFGR = 0;
    RCC->PLLCKSELR = 0;
    RCC->PLLCFGR   = 0;
    RCC->PLL1DIVR  = 0;
    RCC->PLL1FRACR = 0;
    RCC->PLL2DIVR  = 0;
    RCC->PLL2FRACR = 0;
    RCC->PLL3DIVR  = 0;
    RCC->PLL3FRACR = 0;
 	RCC->CR = RCC->CR & ~RCC_CR_HSEBYP;
    RCC->CIER = 0;

	RCC->AHB2ENR = RCC->AHB2ENR | RCC_AHB2ENR_SRAM1EN | RCC_AHB2ENR_SRAM2EN | RCC_AHB2ENR_SRAM3EN;
	RCC->AHB2ENR;
	
	PWR->CR3 = PWR->CR3 & ~(PWR_CR3_SCUEN | PWR_CR3_BYPASS) | PWR_CR3_LDOEN;
	while (!(PWR->CSR1 & PWR_CSR1_ACTVOSRDY)) {}
	
#ifndef sram_layout
	memcpy(&_data, &_data_load, (size_t)&_data_size);
	memcpy(&_itcm, &_itcm_load, (size_t)&_itcm_size);
	memcpy(&_dtcm, &_dtcm_load, (size_t)&_dtcm_size);
	memcpy(&_sram123, &_sram123_load, (size_t)&_sram123_size);
	memcpy(&_sram4, &_sram4_load, (size_t)&_sram4_size);
#endif

	memset(&_bss, 0, (size_t)&_bss_size);
	memset(&_itcm_bss, 0, (size_t)&_itcm_bss_size);
	memset(&_dtcm_bss, 0, (size_t)&_dtcm_bss_size);
	memset(&_sram123_bss, 0, (size_t)&_sram123_bss_size);
	memset(&_sram4_bss, 0, (size_t)&_sram4_bss_size);

	SCB->VTOR = uint32_t(isrVectors);

	for (int i = 2; i < 166; i++)
	{
		isrVectors[i] = FP(Default_Handler);
	}

	__DSB();
	__ISB();
}

extern "C" void __libc_init_array();

void __attribute__((naked, noreturn)) Reset_Handler()
{
	asm("ldr sp, =_estack");
	__ISB();

	SystemInit();
	__libc_init_array();

	main();
	while (true) {}
}

void Default_Handler() { __BKPT(255); }

Код: Выделить всё

//pins2 = ~pins1;
        LDR.N    R1,??DataTable1_4  ;; 0x48000010
        LDR      R2,[R1, #+2048]
        LDR      R3,[R1, #+0]
        AND      R3,R3,#0x23
        AND      R2,R2,#0xF8
        ORR      R2,R2,R3, LSR #+5
        AND      R0,R3,#0x2
        LSLS     R3,R3,#+2
        ORRS     R2,R0,R2
        AND      R3,R3,#0x4
        ORRS     R2,R3,R2
        MVNS     R2,R2
        AND      R3,R2,#0xF8
        RBIT     R0,R3
        LSRS     R0,R0,#+23
        AND      R0,R0,#0x3E
        ORR      R0,R0,#0x3E0000
        STR      R0,[R1, #+1032]
        AND      R0,R2,#0x3
        LSLS     R2,R2,#+3
        AND      R2,R2,#0x20
        ORRS     R2,R2,R0
        ORR      R2,R2,#0x230000
        STR      R2,[R1, #+3080]

Код: Выделить всё

Disassembly of section .text.zap_gpio_one_pin.constprop.0:

00000000 <zap_gpio_one_pin.constprop.0>:
    zap_in_TypeDef init;
    init.data_s = s_gpio;
    zap_GPIO_TypeDef* GPIOx = (zap_GPIO_TypeDef*)(0x40020000 + (uint32_t)init.port);


    GPIOx->MODER = (GPIOx->MODER & (~(3 << (init.pin << 1)))) | (init.mode << (init.pin << 1));
   0:	4b16      	ldr	r3, [pc, #88]	; (5c <zap_gpio_one_pin.constprop.0+0x5c>)
static void zap_gpio_one_pin (const uint32_t s_gpio)
   2:	b570      	push	{r4, r5, r6, lr}
    GPIOx->MODER = (GPIOx->MODER & (~(3 << (init.pin << 1)))) | (init.mode << (init.pin << 1));
   4:	2405      	movs	r4, #5
   6:	681e      	ldr	r6, [r3, #0]
   8:	0060      	lsls	r0, r4, #1
   a:	2203      	movs	r2, #3
   c:	fa02 f500 	lsl.w	r5, r2, r0
  10:	2102      	movs	r1, #2
  12:	ea26 0605 	bic.w	r6, r6, r5
  16:	4081      	lsls	r1, r0
  18:	4331      	orrs	r1, r6
  1a:	6019      	str	r1, [r3, #0]
    GPIOx->PUPDR = (GPIOx->PUPDR & (~(3 << (init.pin << 1)))) | (init.pup << (init.pin << 1));
  1c:	68de      	ldr	r6, [r3, #12]
  1e:	2101      	movs	r1, #1
  20:	4081      	lsls	r1, r0
  22:	ea26 0605 	bic.w	r6, r6, r5
  26:	4331      	orrs	r1, r6
  28:	60d9      	str	r1, [r3, #12]
    GPIOx->OSPEEDR = (GPIOx->OSPEEDR & (~(3 << (init.pin << 1)))) | (init.sped << (init.pin << 1));
  2a:	6899      	ldr	r1, [r3, #8]
  2c:	462a      	mov	r2, r5
  2e:	ea21 0105 	bic.w	r1, r1, r5
  32:	430a      	orrs	r2, r1
  34:	609a      	str	r2, [r3, #8]
    if (init.yper)  GPIOx->OTYPER |= 1 << init.pin; else GPIOx->OTYPER &= ~(1 << init.pin);
  36:	6859      	ldr	r1, [r3, #4]
  38:	2201      	movs	r2, #1
  3a:	40a2      	lsls	r2, r4
  3c:	ea21 0102 	bic.w	r1, r1, r2
  40:	6059      	str	r1, [r3, #4]
    if (init.mode == 2 )
    {
        GPIOx->AFR[init.pin_afa] = (GPIOx->AFR[init.pin_afa] &(~(15 << (init.pin_afd << 2)))) | (init.af << (init.pin_afd << 2));
  42:	6a19      	ldr	r1, [r3, #32]
  44:	f421 0170 	bic.w	r1, r1, #15728640	; 0xf00000
  48:	f441 0140 	orr.w	r1, r1, #12582912	; 0xc00000
  4c:	6219      	str	r1, [r3, #32]
    };
    if (init.lok)
    {
        GPIOx->LCKR = (1 << 16) | (1 << init.pin);
  4e:	f442 3180 	orr.w	r1, r2, #65536	; 0x10000
  52:	61d9      	str	r1, [r3, #28]
        GPIOx->LCKR = 1 << init.pin;
  54:	61da      	str	r2, [r3, #28]
        GPIOx->LCKR = (1 << 16) | (1 << init.pin);
  56:	61d9      	str	r1, [r3, #28]
    };
};
  58:	bd70      	pop	{r4, r5, r6, pc}
  5a:	bf00      	nop
  5c:	40021c00 	.word	0x40021c00